Insulated gate field effect transistor and method

专利名称：Insulated gate field effect transistor and

method for fabricating

发明人：Michael H. Kaneshiro,Diann Dow申请号：US08/223394申请日：19940404公开号：US05427964A公开日：19950627

摘要：Insulated gate field effect transistors (10, 70) having independent process stepsfor setting lateral and vertical dopant profiles for source and drain regions. In a unilateraltransistor (10) , portions (48, 50, 51, 55) of the source region are contained within a haloregion (34, 41) whereas portions (49, 47, 52, 64) of the drain region are non containedwithin a halo region. The source region (60, 65) has a first portion (48, 51) for setting achannel length and a second portion (50, 55 ) for setting a breakdown voltage and asource/drain capacitance. The second portion (50, 55) extends further into the haloregion than the first portion (48, 51). In a bilateral transistor (70), portions (84, 89, 90, 91)of the drain region (72, 87) are contained within halo region (75, 79 ).

申请人：MOTOROLA, INC.

代理机构：Rennie William Dover

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